The present invention relates to a manufacturing method of a semiconductor device in which wirings, connected electrically to elements such as other electronic components, are provided by electrolytic plating.
In case where wirings are provided on a front surface of an insulating protective film by electrolytic plating for the purpose of electrical connection with elements such as other electronic components or wiring substrates, known is a method of providing electrical conductivity by a contact of a cathode (negative electrode) terminal of an electrolytic plating apparatus with a conductive layer as a feeding layer, which is provided on the front surface of the insulating protective film.
As such an electrolytic plating apparatus known is a jet-type electrolytic plating apparatus 100 as shown in FIG. 17.
In the electrolytic plating apparatus 100, a plating liquid blows out through a meshed anode terminal (positive electrode) 103 from a spout 102 which is provided at the center of the bottom of a cup 101. A wafer 110 is supported by a wafer support ring 104 which is provided at the top opening part of the cup 101. The wafer 110 is provided with a feeding layer, which is provided on the entire front surface where semiconductor elements are formed. Further, on the feeding layer a mask having openings corresponding to parts to be given electrolytic plating. A plurality of cathode terminals 105, provided to the wafer support ring 104, are in contact with several points of the outer periphery of the feeding layer of the wafer 110.
Plating treatment is given by passing a predetermined electric current between the anode electrode 103 and the cathode terminals 105 while applying a plating liquid blown out from the spout 102 to the front surface of the wafer 110.
However, the plating method using the electrolytic plating apparatus 100 has the following problems.
Problem 1
When a plating liquid flows into a small contact area between the cathode terminal 105 and the feeding layer, a large voltage drop causes an abnormal growth of plating deposit. The powdery abnormal plating deposit falls down and sticks on the front surface of the wafer 110, which causes a faulty plating such as plating including raised portions.
Problem 2
A larger diameter of the wafer 110 causes a difference in the plating thickness between the circumferential direction and the radial direction. This is because the cathode terminals 105 and the feeding layer come contact with each other at several contact points of the outer periphery of the wafer 110, which increases a difficulty of the flow of plating current in an area far from the contact points, thereby causing a thin plating.
One measure against the above problem 1 is a technique of Japanese Laid-Open Patent Publication No. 2000-328291 (Tokukai 2000-328291, published on Nov. 28, 2000, hereinafter referred to as xe2x80x9cprior art 1xe2x80x9d). The prior art 1 discloses arrangement of a wafer support ring 104 and a cathode terminal 105 and a conducting method as shown in FIG. 18. According to the prior art 1, a wafer 110 (see FIG. 17) closely sticks to a packing 106, having a smaller diameter than that of the wafer 110, which is provided so as to prevent a plating liquid from flowing into anywhere other than the surface to be plated. The cathode terminal 105 electrically contacts over the substantially entire periphery of the wafer 110 outside the packing 106, so that the cathode terminal 105 and the plating liquid cannot come into contact with each other.
Another measure against the above problem 1 is a technique of Japanese Laid-Open Patent Publication No. 41697/1992 (Tokukaihei 4-41697, published on Feb. 12, 1992, hereinafter referred to as xe2x80x9cprior art 2xe2x80x9d). The prior art 2 discloses an arrangement of a cathode terminal (a contact pin for plating) 105 and a conducting method. According to the prior art 2, a tip of a cathode terminal 105 made of metal, which electrically contacts with a feeding layer (base conductive coating film) is surrounded by a flexible insulating cover 107 having a shape of suction cup to prevent the contact with the plating liquid. The cathode terminal 105 is pushed on the wafer (a work to be plated) 110 (see FIG. 17), and the insulating cover 107 deforms and closely sticks to the wafer 110, thereby preventing the plating liquid from contacting with the tip of the cathode terminal 105.
As one measure against the above problem 2, the prior art 1 has an arrangement in which the cathode terminal 105 electrically contacts over the substantially entire periphery of the wafer 110, whereby the plating current in the feeding layer (base metallic layer) passes uniformly in the circumferential direction. Further, the anode electrode 103 (see FIG. 17) is arranged to the umbrella shape high in the center near to the wafer 11, thereby making the thickness of plating in the radial direction uniform.
Further, as another measure against the above problem 2, the thickness of the feeding layer can be increased so that the plating current can easily pass.
Incidentally, in such an arrangement as the above prior arts 1 and 2 in which the contact of the packing 106 and the insulating cover 107 with the wafer 110 separates the cathode terminal 105 and the plating liquid, involved is a risk of the substantial contact of the cathode terminal 105 and the plating liquid. Therefore, it cannot be said that the arrangement can perfectly prevent the faulty plating caused by the growth of the abnormal plating deposit due to the contact of the plating liquid and the cathode terminal. Accordingly, inevitable are damage to the wafer 110 when the contact occurs and increased costs along with maintenance of the electrolytic plating apparatus 100 including the cathode terminal 105.
Further, the above prior art 1 has an arrangement in which the cathode terminal 105 electrically contacts over the substantially entire periphery of the feeding layer outside the packing 106, which is provided to prevent the plating liquid from flowing into anywhere other than the surface to be plated. However, the packing 106 contacts over the substantially entire periphery of the wafer 110; therefore, an outer part from the packing 106 is not plated. This results in decrease in yield and requires a condition that parts where the packing 106 contacts should be flat.
Further, in the arrangement of the prior art 2 in which the insulating cover 107 is provided around the tip of the cathode terminal 105 to prevent the contact with the plating liquid, it is important to keep the optimal balance in height between the tip of the cathode terminal 105 and the top end part of the insulating cover 107. Because of a small difference in height between the tip of the cathode terminal 105 and the top end part of the insulating cover 107, the cathode terminal 105 comes into contact with the wafer 110 before the deformed insulating cover 107 sticks to the wafer 110. This causes less stickiness of the insulating cover 107, so that the cathode terminal 105 and the plating liquid comes into contact with each other. Conversely, when the position of the tip of the cathode terminal 105 is too much lower than the insulating cover 107, the electrical contact of the wafer 110 and the cathode terminal 105 is difficult, which causes a poor conductivity.
Further, in the conducting method of the above prior art 1, the anode electrode 103 has the umbrella shape high in the center near to the wafer 110 to make the thickness of plating in the radial direction uniform, with consideration that the plating current in the radial direction of the wafer 110 is decreased toward the center of the wafer 110. However, it is necessary to work the meshed anode electrode 103 into an umbrella shape, thereby increasing manufacturing costs. Further, it is necessary to change a suitable shape of the anode electrode 103 and its position, depending on conditions such as a wiring arrangement of the semiconductor device, so that it is impossible to provide a plating treatment to different types of wafers with the same electrolytic plating apparatus.
In order to make the plating current easy to flow, expensive materials such as Au for the feeding layer is used in the arrangement to increase the thickness of the feeding layer, thereby increasing manufacturing costs. Further, the feeding layer on which the plating layer is not provided must be removed by methods such as etching. However, the thicker the feeding layer is, longer the time required for a treatment process is. Further, in case of chemical etching, etching is carried out in the longitudinal direction as well as the thickness direction. This causes excessive removal of the feeding layer under the plating layer as a wiring, which might occur a poor wiring.
An object of the present invention is to provide a manufacturing method of a semiconductor device which can prevent a faulty plating caused by the growth of abnormal plating deposit due to the contact of a plating liquid and a cathode terminal.
A further object of the present invention is to provide a manufacturing method of a semiconductor device in which a plating layer having a uniform thickness can be provided.
To achieve the above objects, a manufacturing method of a semiconductor device according to the present invention for providing wires on a front surface of a semiconductor wafer in such a manner that a conductive layer is provided over a substantially entire front surface of a semiconductor wafer for mounting semiconductor elements, electrolytic plating is carried out to a wiring part on the conductive layer, and then the conductive layer not including the wiring part is partially removed,
the manufacturing method includes the steps of:
(a) providing a plurality of through-holes each of which passes between the front and back surfaces of the semiconductor wafer and then providing conductive material in the through-holes;
(b) providing the conductive layer over the substantially entire front surface of the semiconductor wafer;
(c) providing the conductive layer over a substantially entire back surface of the semiconductor wafer; and
(d) electrically connecting between the conductive layer on the back surface of the semiconductor wafer and cathode terminals of an electrolytic plating apparatus and carrying out electrolytic plating with respect to the wiring part.
Note that, the order of the above steps is not limited to that described above.
Generally, in a manufacturing method of a semiconductor device, in case where wires are provided by electrolytic plating for the purpose of electrical connection with elements such as other electronic components or wiring substrates, known is a method of providing electrical conductivity by a contact of a cathode (negative electrode) terminal of an electrolytic plating apparatus with a conductive layer as a feeding layer, which is provided on the front surface of the insulating protective film.
The feature of the manufacturing method of a semiconductor device according to the present invention is that as a semiconductor wafer according to the manufacturing method of the above semiconductor device, used is a semiconductor wafer being provided with conductive layers over the substantially entire front and back surfaces thereof, wherein, for example, a mask is formed on the conductive layer provided on the front surface, and conductive material provided in through-holes enables the conductive layers provided on the front and back surfaces to conduct electricity.
The conductive layers provided over the substantially entire front and back surfaces of the semiconductor wafer may be provided over the entire front and back surfaces of the semiconductor wafer, provided that the conductive layers are provided over a sufficient area so as to serve as a feeding layer for plating. That is, the area where the conductive layer of the front surface of the semiconductor wafer is provided may be an area which includes contact points with cathode terminals of the electrolytic plating apparatus and the provision region of the through-holes, provided that the provision region is included in an area which includes any one of the contact points. Further, the area where the conductive layer of the back surface of the semiconductor wafer is provided may be an area which includes the provision region of a plating layer (electrolytic plating layer) and the provision region of the through-holes, provided that the provision region of the plating layer is included in an area which includes any one of through-holes.
According to the above arrangement, the conductive layer of the back surface of the semiconductor wafer can include the contact points with the cathode terminals of the electrolytic plating apparatus in its area, and it is possible to obtain conductivity inside the conductive layer as the feeding layer, because of the plating current which flows from the cathode terminal contacting with the conductive layer. Further, the conductive material provided in the through-hole of the semiconductor wafer can provide conductivity between the electronically conductive layers of the back and front surfaces of the semiconductor wafer. Still further, the conductive layer of the front surface of the semiconductor wafer can include the provision region of the through-holes in its area, and it is possible to obtain conductivity inside the conductive layer as a base of the plating layer, so that the conductive layer of the front surface can be a feeding layer (a feeding layer for plating) to provide a plating layer. Therefore, it is possible to provide the plating layer on the conductive layer side of the front surface of the semiconductor wafer.
Here, the cathode terminal of the electrolytic plating apparatus is in contact with the conductive layer of the back surface of the semiconductor wafer, in other words, not in contact with the front surface to be provided the plating layer, so that, for example, it is possible to prevent the contact of the plating liquid, which is applied to the front surface of the semiconductor wafer of the jet-type electrolytic plating apparatus, and the cathode terminal. Therefore, it is possible to prevent the occurrence of the faulty plating caused by the growth of the abnormal plating deposit. Accordingly, it is possible to reduce the costs for damage to the semiconductor wafer when the contact occurs and for maintenance of the electrolytic plating apparatus including the cathode terminal.
Further, it is possible to prevent the contact of the plating liquid and the cathode terminal, so that it is not necessary to provide a packing and others on the supporting side by the contact with the surface of the semiconductor wafer so as to prevent the plating liquid from flowing into anywhere other than a target area of plating. Accordingly, a minimized part of supporting the semiconductor wafer can maximize a target area of plating on the surface of the semiconductor wafer. Still further, it is possible to hang the semiconductor wafer so as to support it, so that the entire front surface of the semiconductor wafer can be a target area of plating. Therefore, it is possible to increase yield in manufacturing the semiconductor wafer. Further, it is possible to stop restriction such that a contact part with the packing and others should be flat, which can simplify the management of the manufacturing process of the semiconductor wafer.
As a result of this, it is possible to provide the manufacturing method of the semiconductor device which can prevent the faulty plating caused by the growth of abnormal plating deposit due to the contact of the plating liquid and the cathode terminal.
For a fuller understanding of the nature and advantages of the invention, reference should be made to the ensuing detailed description taken in conjunction with the accompanying drawings.